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Senior ASIC Digital IC Design & Timing Closure Engineer

Realtek Singapore Private Limited

placeSingapore home_workPresencial labelEngineering Jobs publicVaga agregada · SG

eventPublicada em 06 de ago. de 2026 · verifiedVerificamos em 11 de ago. de 2026 que ainda está no ar

SGD 1.080 – SGD 1.560 / ano

Sobre a vaga

Realtek Singapore Private Limited in Singapore is seeking a skilled ASIC design engineer to join the timing and power integrity team. You will collaborate with system engineers on timing requirements, optimize timing closure, and support power structure analysis and iso lations, to deliver robust silicon. You will conduct logic synthesis, static timing analysis, and DFT awareness, and contribute to back-end timing violation analysis, scan insertion, and power optimization. J-18808-Ljbffr

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